Abstract : this paper describes the problem to improve military intergrated circuit reliability , and how to take actions practically to further improve ic reliability 摘要:論述了現(xiàn)階段軍用集成電路為提高可靠性所應(yīng)注意的問題以及如何在實(shí)際生產(chǎn)中采取相應(yīng)的措施來進(jìn)一步提高器件的可靠性。
This thesis aims at discussing the model of manufacturing defects , the principles of soft and hard faults induced by manufacturing defects , the effects of soft fault on circuit reliability and yield and the relationship between yield loss and reliability decrease caused by manufacturing defects . the author ' s main contributions are as following : reliability and yield are two significant factors to semiconductor manufacture . based on the principles of the manufacturability engineering , the thesis discusses the effects of the manufacturing defect on the functional yield , parametric yield and the reliability for ics , and abstracts geometric models from actual chips 本文對(duì)集成電路制造缺陷模型、由制造缺陷導(dǎo)致的軟、硬故障的作用機(jī)理、軟故障對(duì)電路可靠性和成品率的影響以及由制造缺陷導(dǎo)致的電路成品率的損失和可靠性下降之間的關(guān)系進(jìn)行了系統(tǒng)的研究,主要研究結(jié)果如下:可靠性和成品率是影響半導(dǎo)體生產(chǎn)的兩個(gè)主要因素,本文首先從集成電路的可制造性工程理論出發(fā),討論了制造缺陷在影響集成電路功能成品率、參數(shù)成品率和可靠性方面的作用。
It also owns the specialty design capacity for electrical circuitry , software , pcblayout , analysis and test of circuit reliability , products safety regulation , electromagnetism compatibility , plane design and plastic mould . the company adopts the world advanced manufacturing technology and management methods and makes use of the world latest study achievements in specialty display field extensively . the company possess of leading core technology system 我們擁有crt lcd顯示器設(shè)計(jì)室和產(chǎn)品可靠性實(shí)驗(yàn)室,具有電子線路軟件pcblayout電路可靠性分析測(cè)試產(chǎn)品安規(guī)電磁兼容平面設(shè)計(jì)塑膠模具等專業(yè)設(shè)計(jì)能力,因地制宜地采用世界上先進(jìn)的制造技術(shù)和管理方法廣泛利用世界專用顯示領(lǐng)域的最新研究成果,擁有領(lǐng)先的核心技術(shù)體系。
百科解釋
Circuit reliability (also time availability) (CiR) is the percentage of time an electronic circuit was available for use in a specified period of scheduled availability. Circuit reliability is given by where T o is the circuit total outage time, Ts is the circuit total scheduled time, and T a is the circuit total available time.